The Mighty Shiz: Closing the loop with my linear encoders. Hal file changes.

Let's see what I've got, now that I think I've got the 5i25 set up to support a 7i76 and a 7i85. I'm going to want to connect up a couple of linear encoders soon, one for each of the X and Z axes. The spindle (rotary) encoder is natively supported by the 7i76.

This is how to show the hal "pins" that have been generated:

halrun
loadrt hostmot2
loadrt hm2_pci
show pin

Component Pins:
Owner Type Dir Value Name

(7i76 - 32 inputs):
7 s32 OUT 0 hm2_5i25.0.0.debug
7 bit OUT FALSE hm2_5i25.0.7i76.0.0.input-00
7 bit OUT FALSE hm2_5i25.0.7i76.0.0.input-00-not
7 bit OUT FALSE hm2_5i25.0.7i76.0.0.input-01
7 bit OUT FALSE hm2_5i25.0.7i76.0.0.input-01-not
7 bit OUT FALSE hm2_5i25.0.7i76.0.0.input-02
7 bit OUT FALSE hm2_5i25.0.7i76.0.0.input-02-not
7 bit OUT FALSE hm2_5i25.0.7i76.0.0.input-03
7 bit OUT FALSE hm2_5i25.0.7i76.0.0.input-03-not
7 bit OUT FALSE hm2_5i25.0.7i76.0.0.input-04
7 bit OUT FALSE hm2_5i25.0.7i76.0.0.input-04-not
7 bit OUT FALSE hm2_5i25.0.7i76.0.0.input-05
7 bit OUT FALSE hm2_5i25.0.7i76.0.0.input-05-not
7 bit OUT FALSE hm2_5i25.0.7i76.0.0.input-06
7 bit OUT FALSE hm2_5i25.0.7i76.0.0.input-06-not
7 bit OUT FALSE hm2_5i25.0.7i76.0.0.input-07
7 bit OUT FALSE hm2_5i25.0.7i76.0.0.input-07-not
7 bit OUT FALSE hm2_5i25.0.7i76.0.0.input-08
7 bit OUT FALSE hm2_5i25.0.7i76.0.0.input-08-not
7 bit OUT FALSE hm2_5i25.0.7i76.0.0.input-09
7 bit OUT FALSE hm2_5i25.0.7i76.0.0.input-09-not
7 bit OUT FALSE hm2_5i25.0.7i76.0.0.input-10
7 bit OUT FALSE hm2_5i25.0.7i76.0.0.input-10-not
7 bit OUT FALSE hm2_5i25.0.7i76.0.0.input-11
7 bit OUT FALSE hm2_5i25.0.7i76.0.0.input-11-not
7 bit OUT FALSE hm2_5i25.0.7i76.0.0.input-12
7 bit OUT FALSE hm2_5i25.0.7i76.0.0.input-12-not
7 bit OUT FALSE hm2_5i25.0.7i76.0.0.input-13
7 bit OUT FALSE hm2_5i25.0.7i76.0.0.input-13-not
7 bit OUT FALSE hm2_5i25.0.7i76.0.0.input-14
7 bit OUT FALSE hm2_5i25.0.7i76.0.0.input-14-not
7 bit OUT FALSE hm2_5i25.0.7i76.0.0.input-15
7 bit OUT FALSE hm2_5i25.0.7i76.0.0.input-15-not
7 bit OUT FALSE hm2_5i25.0.7i76.0.0.input-16
7 bit OUT FALSE hm2_5i25.0.7i76.0.0.input-16-not
7 bit OUT FALSE hm2_5i25.0.7i76.0.0.input-17
7 bit OUT FALSE hm2_5i25.0.7i76.0.0.input-17-not
7 bit OUT FALSE hm2_5i25.0.7i76.0.0.input-18
7 bit OUT FALSE hm2_5i25.0.7i76.0.0.input-18-not
7 bit OUT FALSE hm2_5i25.0.7i76.0.0.input-19
7 bit OUT FALSE hm2_5i25.0.7i76.0.0.input-19-not
7 bit OUT FALSE hm2_5i25.0.7i76.0.0.input-20
7 bit OUT FALSE hm2_5i25.0.7i76.0.0.input-20-not
7 bit OUT FALSE hm2_5i25.0.7i76.0.0.input-21
7 bit OUT FALSE hm2_5i25.0.7i76.0.0.input-21-not
7 bit OUT FALSE hm2_5i25.0.7i76.0.0.input-22
7 bit OUT FALSE hm2_5i25.0.7i76.0.0.input-22-not
7 bit OUT FALSE hm2_5i25.0.7i76.0.0.input-23
7 bit OUT FALSE hm2_5i25.0.7i76.0.0.input-23-not
7 bit OUT FALSE hm2_5i25.0.7i76.0.0.input-24
7 bit OUT FALSE hm2_5i25.0.7i76.0.0.input-24-not
7 bit OUT FALSE hm2_5i25.0.7i76.0.0.input-25
7 bit OUT FALSE hm2_5i25.0.7i76.0.0.input-25-not
7 bit OUT FALSE hm2_5i25.0.7i76.0.0.input-26
7 bit OUT FALSE hm2_5i25.0.7i76.0.0.input-26-not
7 bit OUT FALSE hm2_5i25.0.7i76.0.0.input-27
7 bit OUT FALSE hm2_5i25.0.7i76.0.0.input-27-not
7 bit OUT FALSE hm2_5i25.0.7i76.0.0.input-28
7 bit OUT FALSE hm2_5i25.0.7i76.0.0.input-28-not
7 bit OUT FALSE hm2_5i25.0.7i76.0.0.input-29
7 bit OUT FALSE hm2_5i25.0.7i76.0.0.input-29-not
7 bit OUT FALSE hm2_5i25.0.7i76.0.0.input-30
7 bit OUT FALSE hm2_5i25.0.7i76.0.0.input-30-not
7 bit OUT FALSE hm2_5i25.0.7i76.0.0.input-31
7 bit OUT FALSE hm2_5i25.0.7i76.0.0.input-31-not
(7i76 - 16 outputs):

7 bit IN FALSE hm2_5i25.0.7i76.0.0.output-00
7 bit IN FALSE hm2_5i25.0.7i76.0.0.output-01
7 bit IN FALSE hm2_5i25.0.7i76.0.0.output-02
7 bit IN FALSE hm2_5i25.0.7i76.0.0.output-03
7 bit IN FALSE hm2_5i25.0.7i76.0.0.output-04
7 bit IN FALSE hm2_5i25.0.7i76.0.0.output-05
7 bit IN FALSE hm2_5i25.0.7i76.0.0.output-06
7 bit IN FALSE hm2_5i25.0.7i76.0.0.output-07
7 bit IN FALSE hm2_5i25.0.7i76.0.0.output-08
7 bit IN FALSE hm2_5i25.0.7i76.0.0.output-09
7 bit IN FALSE hm2_5i25.0.7i76.0.0.output-10
7 bit IN FALSE hm2_5i25.0.7i76.0.0.output-11
7 bit IN FALSE hm2_5i25.0.7i76.0.0.output-12
7 bit IN FALSE hm2_5i25.0.7i76.0.0.output-13
7 bit IN FALSE hm2_5i25.0.7i76.0.0.output-14
7 bit IN FALSE hm2_5i25.0.7i76.0.0.output-15

(7i76 - spindle control outputs):
7 bit IN FALSE hm2_5i25.0.7i76.0.0.spindir
7 bit IN FALSE hm2_5i25.0.7i76.0.0.spinena
7 float IN 0 hm2_5i25.0.7i76.0.0.spinout
(Encoders - there seem to be 6??):

7 s32 OUT 0 hm2_5i25.0.encoder.00.count
7 s32 OUT 0 hm2_5i25.0.encoder.00.count-latched
7 bit I/O FALSE hm2_5i25.0.encoder.00.index-enable
7 bit OUT FALSE hm2_5i25.0.encoder.00.input-a
7 bit OUT FALSE hm2_5i25.0.encoder.00.input-b
7 bit OUT TRUE hm2_5i25.0.encoder.00.input-index
7 bit IN FALSE hm2_5i25.0.encoder.00.latch-enable
7 bit IN FALSE hm2_5i25.0.encoder.00.latch-polarity
7 float OUT 0 hm2_5i25.0.encoder.00.position
7 float OUT 0 hm2_5i25.0.encoder.00.position-latched
7 bit OUT FALSE hm2_5i25.0.encoder.00.quad-error
7 bit IN FALSE hm2_5i25.0.encoder.00.quad-error-enable
7 s32 OUT 0 hm2_5i25.0.encoder.00.rawcounts
7 s32 OUT 0 hm2_5i25.0.encoder.00.rawlatch
7 bit IN FALSE hm2_5i25.0.encoder.00.reset
7 float OUT 0 hm2_5i25.0.encoder.00.velocity
7 float OUT 0 hm2_5i25.0.encoder.00.velocity-rpm
7 s32 OUT 0 hm2_5i25.0.encoder.01.count
7 s32 OUT 0 hm2_5i25.0.encoder.01.count-latched
7 bit I/O FALSE hm2_5i25.0.encoder.01.index-enable
7 bit OUT FALSE hm2_5i25.0.encoder.01.input-a
7 bit OUT FALSE hm2_5i25.0.encoder.01.input-b
7 bit OUT TRUE hm2_5i25.0.encoder.01.input-index
7 bit IN FALSE hm2_5i25.0.encoder.01.latch-enable
7 bit IN FALSE hm2_5i25.0.encoder.01.latch-polarity
7 float OUT 0 hm2_5i25.0.encoder.01.position
7 float OUT 0 hm2_5i25.0.encoder.01.position-latched
7 bit OUT FALSE hm2_5i25.0.encoder.01.quad-error
7 bit IN FALSE hm2_5i25.0.encoder.01.quad-error-enable
7 s32 OUT 0 hm2_5i25.0.encoder.01.rawcounts
7 s32 OUT 0 hm2_5i25.0.encoder.01.rawlatch
7 bit IN FALSE hm2_5i25.0.encoder.01.reset
7 float OUT 0 hm2_5i25.0.encoder.01.velocity
7 float OUT 0 hm2_5i25.0.encoder.01.velocity-rpm
7 s32 OUT 0 hm2_5i25.0.encoder.02.count
7 s32 OUT 0 hm2_5i25.0.encoder.02.count-latched
7 bit I/O FALSE hm2_5i25.0.encoder.02.index-enable
7 bit OUT TRUE hm2_5i25.0.encoder.02.input-a
7 bit OUT TRUE hm2_5i25.0.encoder.02.input-b
7 bit OUT FALSE hm2_5i25.0.encoder.02.input-index
7 bit IN FALSE hm2_5i25.0.encoder.02.latch-enable
7 bit IN FALSE hm2_5i25.0.encoder.02.latch-polarity
7 float OUT 0 hm2_5i25.0.encoder.02.position
7 float OUT 0 hm2_5i25.0.encoder.02.position-latched
7 bit OUT FALSE hm2_5i25.0.encoder.02.quad-error
7 bit IN FALSE hm2_5i25.0.encoder.02.quad-error-enable
7 s32 OUT 0 hm2_5i25.0.encoder.02.rawcounts
7 s32 OUT 0 hm2_5i25.0.encoder.02.rawlatch
7 bit IN FALSE hm2_5i25.0.encoder.02.reset
7 float OUT 0 hm2_5i25.0.encoder.02.velocity
7 float OUT 0 hm2_5i25.0.encoder.02.velocity-rpm
7 s32 OUT 0 hm2_5i25.0.encoder.03.count
7 s32 OUT 0 hm2_5i25.0.encoder.03.count-latched
7 bit I/O FALSE hm2_5i25.0.encoder.03.index-enable
7 bit OUT TRUE hm2_5i25.0.encoder.03.input-a
7 bit OUT TRUE hm2_5i25.0.encoder.03.input-b
7 bit OUT FALSE hm2_5i25.0.encoder.03.input-index
7 bit IN FALSE hm2_5i25.0.encoder.03.latch-enable
7 bit IN FALSE hm2_5i25.0.encoder.03.latch-polarity
7 float OUT 0 hm2_5i25.0.encoder.03.position
7 float OUT 0 hm2_5i25.0.encoder.03.position-latched
7 bit OUT FALSE hm2_5i25.0.encoder.03.quad-error
7 bit IN FALSE hm2_5i25.0.encoder.03.quad-error-enable
7 s32 OUT 0 hm2_5i25.0.encoder.03.rawcounts
7 s32 OUT 0 hm2_5i25.0.encoder.03.rawlatch
7 bit IN FALSE hm2_5i25.0.encoder.03.reset
7 float OUT 0 hm2_5i25.0.encoder.03.velocity
7 float OUT 0 hm2_5i25.0.encoder.03.velocity-rpm
7 s32 OUT 0 hm2_5i25.0.encoder.04.count
7 s32 OUT 0 hm2_5i25.0.encoder.04.count-latched
7 bit I/O FALSE hm2_5i25.0.encoder.04.index-enable
7 bit OUT TRUE hm2_5i25.0.encoder.04.input-a
7 bit OUT TRUE hm2_5i25.0.encoder.04.input-b
7 bit OUT FALSE hm2_5i25.0.encoder.04.input-index
7 bit IN FALSE hm2_5i25.0.encoder.04.latch-enable
7 bit IN FALSE hm2_5i25.0.encoder.04.latch-polarity
7 float OUT 0 hm2_5i25.0.encoder.04.position
7 float OUT 0 hm2_5i25.0.encoder.04.position-latched
7 bit OUT FALSE hm2_5i25.0.encoder.04.quad-error
7 bit IN FALSE hm2_5i25.0.encoder.04.quad-error-enable
7 s32 OUT 0 hm2_5i25.0.encoder.04.rawcounts
7 s32 OUT 0 hm2_5i25.0.encoder.04.rawlatch
7 bit IN FALSE hm2_5i25.0.encoder.04.reset
7 float OUT 0 hm2_5i25.0.encoder.04.velocity
7 float OUT 0 hm2_5i25.0.encoder.04.velocity-rpm
7 s32 OUT 0 hm2_5i25.0.encoder.05.count
7 s32 OUT 0 hm2_5i25.0.encoder.05.count-latched
7 bit I/O FALSE hm2_5i25.0.encoder.05.index-enable
7 bit OUT TRUE hm2_5i25.0.encoder.05.input-a
7 bit OUT TRUE hm2_5i25.0.encoder.05.input-b
7 bit OUT FALSE hm2_5i25.0.encoder.05.input-index
7 bit IN FALSE hm2_5i25.0.encoder.05.latch-enable
7 bit IN FALSE hm2_5i25.0.encoder.05.latch-polarity
7 float OUT 0 hm2_5i25.0.encoder.05.position
7 float OUT 0 hm2_5i25.0.encoder.05.position-latched
7 bit OUT FALSE hm2_5i25.0.encoder.05.quad-error
7 bit IN FALSE hm2_5i25.0.encoder.05.quad-error-enable
7 s32 OUT 0 hm2_5i25.0.encoder.05.rawcounts
7 s32 OUT 0 hm2_5i25.0.encoder.05.rawlatch
7 bit IN FALSE hm2_5i25.0.encoder.05.reset
7 float OUT 0 hm2_5i25.0.encoder.05.velocity
7 float OUT 0 hm2_5i25.0.encoder.05.velocity-rpm
7 u32 IN 0x007F2815 hm2_5i25.0.encoder.muxed-sample-frequency

(GPIO):
7 bit OUT FALSE hm2_5i25.0.gpio.000.in
7 bit OUT TRUE hm2_5i25.0.gpio.000.in_not
7 bit OUT FALSE hm2_5i25.0.gpio.001.in
7 bit OUT TRUE hm2_5i25.0.gpio.001.in_not
7 bit OUT FALSE hm2_5i25.0.gpio.002.in
7 bit OUT TRUE hm2_5i25.0.gpio.002.in_not
7 bit OUT FALSE hm2_5i25.0.gpio.003.in
7 bit OUT TRUE hm2_5i25.0.gpio.003.in_not
7 bit OUT FALSE hm2_5i25.0.gpio.004.in
7 bit OUT TRUE hm2_5i25.0.gpio.004.in_not
7 bit OUT FALSE hm2_5i25.0.gpio.005.in
7 bit OUT TRUE hm2_5i25.0.gpio.005.in_not
7 bit OUT FALSE hm2_5i25.0.gpio.006.in
7 bit OUT TRUE hm2_5i25.0.gpio.006.in_not
7 bit OUT FALSE hm2_5i25.0.gpio.007.in
7 bit OUT TRUE hm2_5i25.0.gpio.007.in_not
7 bit OUT FALSE hm2_5i25.0.gpio.008.in
7 bit OUT TRUE hm2_5i25.0.gpio.008.in_not
7 bit OUT FALSE hm2_5i25.0.gpio.009.in
7 bit OUT TRUE hm2_5i25.0.gpio.009.in_not
7 bit OUT TRUE hm2_5i25.0.gpio.010.in
7 bit OUT FALSE hm2_5i25.0.gpio.010.in_not
7 bit OUT TRUE hm2_5i25.0.gpio.011.in
7 bit OUT FALSE hm2_5i25.0.gpio.011.in_not
7 bit OUT TRUE hm2_5i25.0.gpio.012.in
7 bit OUT FALSE hm2_5i25.0.gpio.012.in_not
7 bit IN FALSE hm2_5i25.0.gpio.012.out
7 bit OUT TRUE hm2_5i25.0.gpio.013.in
7 bit OUT FALSE hm2_5i25.0.gpio.013.in_not
7 bit IN FALSE hm2_5i25.0.gpio.013.out
7 bit OUT FALSE hm2_5i25.0.gpio.014.in
7 bit OUT TRUE hm2_5i25.0.gpio.014.in_not
7 bit OUT FALSE hm2_5i25.0.gpio.015.in
7 bit OUT TRUE hm2_5i25.0.gpio.015.in_not
7 bit OUT FALSE hm2_5i25.0.gpio.016.in
7 bit OUT TRUE hm2_5i25.0.gpio.016.in_not
7 bit OUT TRUE hm2_5i25.0.gpio.017.in
7 bit OUT FALSE hm2_5i25.0.gpio.017.in_not
7 bit IN FALSE hm2_5i25.0.gpio.017.out
7 bit OUT TRUE hm2_5i25.0.gpio.018.in
7 bit OUT FALSE hm2_5i25.0.gpio.018.in_not
7 bit IN FALSE hm2_5i25.0.gpio.018.out
7 bit OUT TRUE hm2_5i25.0.gpio.019.in
7 bit OUT FALSE hm2_5i25.0.gpio.019.in_not
7 bit IN FALSE hm2_5i25.0.gpio.019.out
7 bit OUT TRUE hm2_5i25.0.gpio.020.in
7 bit OUT FALSE hm2_5i25.0.gpio.020.in_not
7 bit IN FALSE hm2_5i25.0.gpio.020.out
7 bit OUT TRUE hm2_5i25.0.gpio.021.in
7 bit OUT FALSE hm2_5i25.0.gpio.021.in_not
7 bit IN FALSE hm2_5i25.0.gpio.021.out
7 bit OUT TRUE hm2_5i25.0.gpio.022.in
7 bit OUT FALSE hm2_5i25.0.gpio.022.in_not
7 bit IN FALSE hm2_5i25.0.gpio.022.out
7 bit OUT TRUE hm2_5i25.0.gpio.023.in
7 bit OUT FALSE hm2_5i25.0.gpio.023.in_not
7 bit IN FALSE hm2_5i25.0.gpio.023.out
7 bit OUT TRUE hm2_5i25.0.gpio.024.in
7 bit OUT FALSE hm2_5i25.0.gpio.024.in_not
7 bit IN FALSE hm2_5i25.0.gpio.024.out
7 bit OUT TRUE hm2_5i25.0.gpio.025.in
7 bit OUT FALSE hm2_5i25.0.gpio.025.in_not
7 bit IN FALSE hm2_5i25.0.gpio.025.out
7 bit OUT TRUE hm2_5i25.0.gpio.026.in
7 bit OUT FALSE hm2_5i25.0.gpio.026.in_not
7 bit IN FALSE hm2_5i25.0.gpio.026.out
7 bit OUT FALSE hm2_5i25.0.gpio.027.in
7 bit OUT TRUE hm2_5i25.0.gpio.027.in_not
7 bit OUT TRUE hm2_5i25.0.gpio.028.in
7 bit OUT FALSE hm2_5i25.0.gpio.028.in_not
7 bit OUT TRUE hm2_5i25.0.gpio.029.in
7 bit OUT FALSE hm2_5i25.0.gpio.029.in_not
7 bit OUT TRUE hm2_5i25.0.gpio.030.in
7 bit OUT FALSE hm2_5i25.0.gpio.030.in_not
7 bit OUT TRUE hm2_5i25.0.gpio.031.in
7 bit OUT FALSE hm2_5i25.0.gpio.031.in_not
7 bit OUT TRUE hm2_5i25.0.gpio.032.in
7 bit OUT FALSE hm2_5i25.0.gpio.032.in_not
7 bit OUT TRUE hm2_5i25.0.gpio.033.in
7 bit OUT FALSE hm2_5i25.0.gpio.033.in_not
(Various):

7 bit IN FALSE hm2_5i25.0.led.CR01
7 bit IN FALSE hm2_5i25.0.led.CR02
7 s32 OUT 0 hm2_5i25.0.read.time
7 s32 OUT 0 hm2_5i25.0.read_gpio.time
7 u32 OUT 0x00000000 hm2_5i25.0.sserial.port-0.fault-count
7 u32 OUT 0x00000000 hm2_5i25.0.sserial.port-0.port_state
7 u32 OUT 0x00000000 hm2_5i25.0.sserial.port-0.port_state2
7 u32 OUT 0x00000000 hm2_5i25.0.sserial.port-0.port_state3
7 bit IN TRUE hm2_5i25.0.sserial.port-0.run
7 bit IN FALSE hm2_5i25.0.stepgen.00.control-type

(5 step generators):
7 s32 OUT 0 hm2_5i25.0.stepgen.00.counts
7 float OUT 0 hm2_5i25.0.stepgen.00.dbg_err_at_match
7 float OUT 0 hm2_5i25.0.stepgen.00.dbg_ff_vel
7 float OUT 0 hm2_5i25.0.stepgen.00.dbg_pos_minus_prev_cmd
7 float OUT 0 hm2_5i25.0.stepgen.00.dbg_s_to_match
7 s32 OUT 0 hm2_5i25.0.stepgen.00.dbg_step_rate
7 float OUT 0 hm2_5i25.0.stepgen.00.dbg_vel_error
7 bit IN FALSE hm2_5i25.0.stepgen.00.enable
7 float IN 0 hm2_5i25.0.stepgen.00.position-cmd
7 float OUT 0 hm2_5i25.0.stepgen.00.position-fb
7 float IN 0 hm2_5i25.0.stepgen.00.velocity-cmd
7 float OUT 0 hm2_5i25.0.stepgen.00.velocity-fb
7 bit IN FALSE hm2_5i25.0.stepgen.01.control-type
7 s32 OUT 0 hm2_5i25.0.stepgen.01.counts
7 float OUT 0 hm2_5i25.0.stepgen.01.dbg_err_at_match
7 float OUT 0 hm2_5i25.0.stepgen.01.dbg_ff_vel
7 float OUT 0 hm2_5i25.0.stepgen.01.dbg_pos_minus_prev_cmd
7 float OUT 0 hm2_5i25.0.stepgen.01.dbg_s_to_match
7 s32 OUT 0 hm2_5i25.0.stepgen.01.dbg_step_rate
7 float OUT 0 hm2_5i25.0.stepgen.01.dbg_vel_error
7 bit IN FALSE hm2_5i25.0.stepgen.01.enable
7 float IN 0 hm2_5i25.0.stepgen.01.position-cmd
7 float OUT 0 hm2_5i25.0.stepgen.01.position-fb
7 float IN 0 hm2_5i25.0.stepgen.01.velocity-cmd
7 float OUT 0 hm2_5i25.0.stepgen.01.velocity-fb
7 bit IN FALSE hm2_5i25.0.stepgen.02.control-type
7 s32 OUT 0 hm2_5i25.0.stepgen.02.counts
7 float OUT 0 hm2_5i25.0.stepgen.02.dbg_err_at_match
7 float OUT 0 hm2_5i25.0.stepgen.02.dbg_ff_vel
7 float OUT 0 hm2_5i25.0.stepgen.02.dbg_pos_minus_prev_cmd
7 float OUT 0 hm2_5i25.0.stepgen.02.dbg_s_to_match
7 s32 OUT 0 hm2_5i25.0.stepgen.02.dbg_step_rate
7 float OUT 0 hm2_5i25.0.stepgen.02.dbg_vel_error
7 bit IN FALSE hm2_5i25.0.stepgen.02.enable
7 float IN 0 hm2_5i25.0.stepgen.02.position-cmd
7 float OUT 0 hm2_5i25.0.stepgen.02.position-fb
7 float IN 0 hm2_5i25.0.stepgen.02.velocity-cmd
7 float OUT 0 hm2_5i25.0.stepgen.02.velocity-fb
7 bit IN FALSE hm2_5i25.0.stepgen.03.control-type
7 s32 OUT 0 hm2_5i25.0.stepgen.03.counts
7 float OUT 0 hm2_5i25.0.stepgen.03.dbg_err_at_match
7 float OUT 0 hm2_5i25.0.stepgen.03.dbg_ff_vel
7 float OUT 0 hm2_5i25.0.stepgen.03.dbg_pos_minus_prev_cmd
7 float OUT 0 hm2_5i25.0.stepgen.03.dbg_s_to_match
7 s32 OUT 0 hm2_5i25.0.stepgen.03.dbg_step_rate
7 float OUT 0 hm2_5i25.0.stepgen.03.dbg_vel_error
7 bit IN FALSE hm2_5i25.0.stepgen.03.enable
7 float IN 0 hm2_5i25.0.stepgen.03.position-cmd
7 float OUT 0 hm2_5i25.0.stepgen.03.position-fb
7 float IN 0 hm2_5i25.0.stepgen.03.velocity-cmd
7 float OUT 0 hm2_5i25.0.stepgen.03.velocity-fb
7 bit IN FALSE hm2_5i25.0.stepgen.04.control-type
7 s32 OUT 0 hm2_5i25.0.stepgen.04.counts
7 float OUT 0 hm2_5i25.0.stepgen.04.dbg_err_at_match
7 float OUT 0 hm2_5i25.0.stepgen.04.dbg_ff_vel
7 float OUT 0 hm2_5i25.0.stepgen.04.dbg_pos_minus_prev_cmd
7 float OUT 0 hm2_5i25.0.stepgen.04.dbg_s_to_match
7 s32 OUT 0 hm2_5i25.0.stepgen.04.dbg_step_rate
7 float OUT 0 hm2_5i25.0.stepgen.04.dbg_vel_error
7 bit IN FALSE hm2_5i25.0.stepgen.04.enable
7 float IN 0 hm2_5i25.0.stepgen.04.position-cmd
7 float OUT 0 hm2_5i25.0.stepgen.04.position-fb
7 float IN 0 hm2_5i25.0.stepgen.04.velocity-cmd
7 float OUT 0 hm2_5i25.0.stepgen.04.velocity-fb

(Other):
7 bit I/O FALSE hm2_5i25.0.watchdog.has_bit
7 s32 OUT 0 hm2_5i25.0.write.time
7 s32 OUT 0 hm2_5i25.0.write_gpio.time

WTF?? I wasn't expecting to see so many encoders and GPIO. It looks like 12 GPIO inputs and 22(?) GPIO outputs. And apparently 6 encoders?

No, mate. No. Not quite.

Those First 2 are actually the 7i76 encoder - plus a dummy (encoders 0 & 1). Then we have 4 actual encoder channels in the 7i85 (encoders 2, 3 &4. Apparently, encoder channels are multiplexed in pairs back to the FPGA in the 5i25.

Furthermore, the GPIO pins are reported, even though they are already allocated to the encoders, RS-422 channels etc.

A better way to report how the daughtercards are set up is to give it some of this:

sudo mesaflash --device 5i25 --readhmid

...which gives the following:

Configuration pin-out:
IO Connections for P3
Pin# I/O Pri. func Sec. func Chan Pin func Pin Dir
1 0 IOPort StepGen 0 Dir/Table2 (Out)
14 1 IOPort StepGen 0 Step/Table1 (Out)
2 2 IOPort StepGen 1 Dir/Table2 (Out)
15 3 IOPort StepGen 1 Step/Table1 (Out)
3 4 IOPort StepGen 2 Dir/Table2 (Out)
16 5 IOPort StepGen 2 Step/Table1 (Out)
4 6 IOPort StepGen 3 Dir/Table2 (Out)
17 7 IOPort StepGen 3 Step/Table1 (Out)
5 8 IOPort StepGen 4 Dir/Table2 (Out)
6 9 IOPort StepGen 4 Step/Table1 (Out)
7 10 IOPort SSerial 0 TXData0 (Out)
8 11 IOPort SSerial 0 RXData0 (In)
9 12 IOPort SSerial 0 TXData1 (Out)
10 13 IOPort SSerial 0 RXData1 (In)
11 14 IOPort MuxedQCount 0 MuxQ-IDX (In)
12 15 IOPort MuxedQCount 0 MuxQ-B (In)
13 16 IOPort MuxedQCount 0 MuxQ-A (In)
IO Connections for P2
Pin# I/O Pri. func Sec. func Chan Pin func Pin Dir
1 17 IOPort SSerial 0 RXData6 (In)
14 18 IOPort SSerial 0 TXData6 (Out)
2 19 IOPort SSerial 0 RXData5 (In)
15 20 IOPort SSerial 0 TXData5 (Out)
3 21 IOPort SSerial 0 RXData4 (In)
16 22 IOPort SSerial 0 TXData4 (Out)
4 23 IOPort SSerial 0 RXData3 (In)
17 24 IOPort SSerial 0 TXData3 (Out)
5 25 IOPort SSerial 0 RXData2 (In)
6 26 IOPort SSerial 0 TXData2 (Out)
7 27 IOPort MuxedQCountSel 2 MuxSel0 (Out)
8 28 IOPort MuxedQCount 1 MuxQ-A (In)
9 29 IOPort MuxedQCount 1 MuxQ-B (In)
10 30 IOPort MuxedQCount 1 MuxQ-IDX (In)
11 31 IOPort MuxedQCount 2 MuxQ-A (In)
12 32 IOPort MuxedQCount 2 MuxQ-B (In)
13 33 IOPort MuxedQCount 2 MuxQ-IDX (In)

"Mesaflash shows all the hardware (its showing 6 encoders here)
Muxed encoders share a set of pins for 2 encoders
So
Muxed encoder 0 on the 7I76 = hal encoders 0 and 1 (1 is a dummy)
Muxed encoders 1 and 2 on the 7I85 = hal encoders 2,3,4,5"

Sort of makes sense now!

So - what to do?

Something like this? The X.....

# ---Encoder feedback signals/setup---

setp    hm2_7i76e.0.encoder.02.counter-mode 0
setp    hm2_7i76e.0.encoder.02.filter 1
setp    hm2_7i76e.0.encoder.02.index-invert 0
setp    hm2_7i76e.0.encoder.02.index-mask 0
setp    hm2_7i76e.0.encoder.02.index-mask-invert 0
setp    hm2_7i76e.0.encoder.02.scale  [JOINT_0]ENCODER_SCALE

net x-pos-fb               <=  hm2_7i76e.0.encoder.02.position
net x-vel-fb               <=  hm2_7i76e.0.encoder.02.velocity
net x-pos-fb               =>  joint.0.motor-pos-fb
net x-index-enable    joint.0.index-enable  <=>  hm2_7i76e.0.encoder.02.index-enable
net x-pos-rawcounts        <=  hm2_7i76e.0.encoder.02.rawcounts

...and the corresponding Y?

# ---Encoder feedback signals/setup---

setp    hm2_7i76e.0.encoder.01.counter-mode 0
setp    hm2_7i76e.0.encoder.01.filter 1
setp    hm2_7i76e.0.encoder.01.index-invert 0
setp    hm2_7i76e.0.encoder.01.index-mask 0
setp    hm2_7i76e.0.encoder.01.index-mask-invert 0
setp    hm2_7i76e.0.encoder.01.scale  [JOINT_1]ENCODER_SCALE

net y-pos-fb               <=  hm2_7i76e.0.encoder.01.position
net y-vel-fb               <=  hm2_7i76e.0.encoder.01.velocity
net y-pos-fb               =>  joint.1.motor-pos-fb
net y-index-enable    joint.1.index-enable  <=>  hm2_7i76e.0.encoder.01.index-enable
net y-pos-rawcounts        <=  hm2_7i76e.0.encoder.01.rawcounts

Or this (X)?

# ---Encoder feedback signals/setup---

setp hm2_7i76e.0.encoder.01.counter-mode 0
setp hm2_7i76e.0.encoder.01.filter 1
setp hm2_7i76e.0.encoder.01.index-invert 0
setp hm2_7i76e.0.encoder.01.index-mask 0
setp hm2_7i76e.0.encoder.01.index-mask-invert 0
setp hm2_7i76e.0.encoder.01.scale [JOINT_0]ENCODER_SCALE

net x-pos-fb <= hm2_7i76e.0.encoder.01.position
net x-vel-fb <= hm2_7i76e.0.encoder.01.velocity
net x-pos-fb => joint.0.motor-pos-fb
net x-index-enable joint.0.index-enable <=> hm2_7i76e.0.encoder.01.index-enable

net x-pos-rawcounts <= hm2_7i76e.0.encoder.01.rawcounts

Interesting post about linear encoder feedback:

https://forum.linuxcnc.org/38-general-linuxcnc-questions/41556-motor-instabilty-due-to-glass-linear-encoder-of-precision-1-micro-meter#201118

"Therefore it is important that the scale and servo position are the same. Otherwise one always runs after the other and it also vibrates. Check that by switching off the scale.

With encoder off:

#net x-pos-fb   <=  hm2_7i95.0.encoder.00.position	# Encoderpostion to PIN x-pos-fb

With stepgen feedback active:

net x-pos-fb     <= hm2_7i95.0.stepgen.00.position-fb	# Stepgenposition to PIN x-pos-fb

Then compare encoder position and step position. They have to be the same if not adjust your scale parameters. Verify the whole thing with a dial indicator.

Other things. Your servo and amplifier already have their own control loop with KP parameter. It is a good idea to tune this control loop and keep KP in linuxcnc as low as possible.

Finally turn on your scale and it will work.

The following error can be found in joint.0.f-error or using halscope."

This is what I will try:
# Default FB from stepgen:
net x-pos-fb <= hm2_5i25.0.stepgen.00.position-fb # Stepgenposition to PIN x-pos-fb
# Alternative FB from encoder:
# net x-pos-fb <= hm2_5i25.0.encoder.02.position # Encoderposition to PIN x-pos-fb
.....
# Default FB from stepgen:
net z-pos-fb <= hm2_5i25.0.stepgen.01.position-fb # Stepgenposition to PIN z-pos-fb
# Alternative FB from encoder:
# net z-pos-fb <= hm2_5i25.0.encoder.03.position # Encoderposition to PIN z-pos-fb

It still starts up - but does it actually report position correctly?

...to be continued....

The Mighty Shiz

Friday, 26 March 2021

Closing the loop with my linear encoders. Hal file changes.

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TIG welder up and running - after some fault diagnostics and repair